Security Engineering for Backdoor-Free Crypto Hardware


Abstract

In this project, I work with Professor Simha Sethumadhavan and PhD candidate Adam Waksman. The objective is to develop a hardware design pattern that prevents third-party component suppliers from obtaining secret data via hardware backdoors.

Stages in the hardware manufacturing supply chain

Stages in the hardware manufacturing supply chain

As hardware design teams create specialized chips for pervasive computer devices, they rely on components licensed from other design teams. These designs may conceal backdoor circuitry that delivers secret data to an unauthorized party, obliterating all the software security measures built on top of the hardware. Secure design techniques are direly needed to mitigate or identify these backdoors because exhaustive testing has become infeasible for complex designs. In our protection scheme at Columbia, we mask our secret input data using random numbers from a generator operating at line frequency. We then assume the role of the attacker seeking to decode the scrambled input, and demonstrate that an optimal backdoor with any chance of success would require cost-prohibitive amounts of circuitry. My role is to find defense and attack algorithms, implement them all in accurate hardware, and analyze the area and performance costs of the circuits. My colleagues and I are preparing a paper that documents what algorithms work best in this design pattern.

Preliminary Deliverables

A_Circuit-Based_Attack_on_a_Linear_Congruential_Pseudorandom_Number_Generator

Code Activity

[rssinpage rssfeed=’http://code.google.com/feeds/p/aes-castl-project/updates/basic’]